The present invention relates to a wiring design system and method, and more particularly to a wiring design system and method which is advantageous when applied to electronic wiring boards having various wiring restrictions, wherein the system and method shows a rough wiring plan at the floor plan stage so as to complete a wiring design satisfying the wiring restrictions in a short period of time.
Attempts have been made to automate the design of wiring on electronic wiring boards using a computer system.
Description will be made below of problems with prior art wiring design techniques with reference to FIG. 12.
FIG. 12 is a schematic diagram showing an example of how to lay out signal (line) groups having proximity wiring restrictions.
Generally, the wiring on an electronic wiring board is designed under various wiring restrictions since each signal varies in its characteristics and interference occurs between the wires.
For example, if signals on a wiring board have different distance restrictions with respect to their neighboring signals, the wiring density may decrease depending on the arrangement of the wiring paths.
FIG. 12 shows distance restrictions (denoted by reference numeral 1203) between neighboring parallel lines, in which a (minimum) distance is set between each combination of two signal groups. That is, for example, a wire belonging to the signal group groupA and that belonging to the signal group groupB must be spaced 4 units or more apart. It should be noted that a signal group is a group consisting of (signal) wires having the same characteristics.
If wires of the signal group groupA and the signal group groupB have a positional relationship as shown in a wiring state 1201 (in FIG. 12), their wiring restrictions prevent them from being densely arranged.
To overcome this problem, the wires of the same signal group may be disposed adjacent to one another to achieve a dense wiring arrangement; for example, a signal (wire) 1204 of the signal group groupA may be disposed next to a signal (wire) 1206 of the same group, as shown in a wiring state 1202 (in FIG. 12).
Increased speed of semiconductor integrated circuits has made it necessary to match the characteristics of a plurality of signals, which requires that their wiring lengths and wiring paths be made as equal as possible.
To accomplish this, the technique disclosed in Japanese Laid-Open Patent Publication No. 2002-124571 uses the concept of virtual wiring. This technique generates detailed wiring from rough wiring by dividing the virtual wiring. In virtual wiring, a plurality of nets which must be made equal in their characteristics are grouped together and handled as a single virtual net.